A flip chip is generally a monolithic semiconductor device, such as an integrated circuit, having bead-like terminals formed on one surface of the chip. The terminals, commonly referred to as solder bumps, serve to both secure the chip to a circuit board and electrically interconnect the flip chip's circuitry to a conductor pattern formed on the circuit board, which may be a ceramic substrate, printed wiring board, flexible circuit, or a silicon substrate.
Due to the numerous functions typically performed by the microcircuitry of a flip chip, a relatively large number of solder bumps are typically required. Typically, each solder bump is located at the perimeter of the flip chip on an electrically conductive pad that is electrically interconnected with the circuitry on the flip chip. The size of a typical flip chip is generally on the order of a few millimeters per side. As a result, flip chip conductor patterns are typically composed of numerous individual conductors, often spaced on the order of about 0.2 millimeter apart.
Placement of the solder bumps on a flip chip must be precisely controlled not only to coincide with the spacing of the conductors, but also to control the height of the solder bumps after soldering. Controlling the height of solder bumps after reflow is necessary in order to prevent the surface tension of the molten solder bumps from drawing the flip chip excessively close to the substrate during the bonding operation. Sufficient spacing between the chip and its substrate is necessary for enabling stress relief during thermal cycles, allowing penetration of cleaning solutions for removing undesirable residues, and enabling the penetration of mechanical bonding and encapsulation materials between the chip and its substrate.
Because of the narrow spacing required for the solder bumps, the forming of solder bumps on a flip chip requires a significant degree of precision. For this reason, reflow solder methods are widely utilized to form solder bumps on flip chips, as well as to solder flip chips to a substrate. For example, reflow solder methods are employed to form solder bumps on the surface of the flip chip in conjunction with a solder bump transfer technique. Such techniques involve physically transferring solder to the surface of the flip chip and then heating, or reflowing, the solder to form solder bumps that adhere to the flip chip. The flip chip is then soldered to its conductor pattern by registering the solder bumps with their respective conductors and reflowing the solder so as to metallurgically bond the chip to the conductor pattern, and thereby electrically interconnect each of the solder bumps with its corresponding conductor.
One known solder bump transfer technique is to place preformed solder balls on the surface of a chip, typically onto a solder pad formed on the flip chip, using a precision placement machine. Once in place, the solder balls are reflowed, causing the solder balls to adhere to the solder pad and form the characteristic solder bumps. A significant disadvantage associated with this approach is the processing costs due to the limited process reliability and speed of the pick-and-place nature of the transfer process. Another disadvantage is that physical placement of each solder ball with a machine dictates a minimum spacing between solder bumps on the flip chip, and therefore artificially requires a larger flip chip than would otherwise be necessary for the flip chip circuitry.
A second known solder bump transfer technique is to form solder bumps on the surface of a carrier chip by masking and plating the carrier chip with a platable solder alloy, stripping the mask, and then reflowing the solder plating to form solder balls on the surface of the carrier chip. Thereafter, the carrier chip is heated to liquefy the solder balls, and then registered with a flip chip to transfer the solder balls to the flip chip.
A significant disadvantage associated with this approach is that the process is limited to platable solder compositions. Due to the process control limitations of conventional plating processes, the final alloy composition of the solder bumps may not be controlled to the degree necessary to reliably achieve desired solder bond strength and electrical characteristics for the flip chip. Furthermore, the solder plating process is characterized by many steps, which thereby raises the costs for this transfer technique.
In view of the above, it can be seen that the two solder bump transfer techniques described above have significant shortcomings that complicate the formation of solder bumps on a flip chip and/or increase the processing costs for flip chip fabrication. Accordingly, it would be desirable if a solder bump transfer technique were available that was cost effective, reliable, and relatively rapid, promoted minimal spacing between solder bumps on a flip chip, and did not necessitate the use of a plating process to form the solder bumps.